Abstract:
In recent years, there is a growing need for power-efficient hardware in resource-constrained scenarios to enable new deep learning applications in areas such as smart infrastructure and healthcare (e.g., brain computer interfaces). Di Wu's work explores unary computing as a promising solution for two reasons. First, deep learning has shown tolerance to lower-precision data, which drastically shortens serial unary bits, i.e., bitstreams, for boosted efficiency. Second, unary hardware is extremely cheap, e.g., an AND gate acts as a unary multiplier. His research aims to answer two questions: 1) what are the fundamental challenges of unary computing and the corresponding solutions, and 2) how to design power-efficient computer architecture using unary computing. In this talk, Di Wu will present his work in three phases: 1) solving the fundamental challenges of unary computing to make it generally applicable, 2) exploring the hardware design space of unary architectures, and 3) showcasing the benefit of unary computing via a hardware algorithm co-designed brain computer interface.
Bio:
Di Wu is currently a Ph.D. candidate in the ECE department at UW–Madison, advised by Professor Joshua San Miguel. His research interests are in emerging computer architecture areas, mainly unary, approximate and neuromorphic computing. He received bachelor's and master's degrees from Fudan University in Shanghai, China. He spent two years working in HiSilicon and did multiple internships in Meta and Cerebras Systems working on deep learning hardware-software co-design. He is a recipient of the Wisconsin Distinguished Graduate Fellowship, and his research was selected as a Qualcomm Innovation Fellowship Finalist in 2019 and awarded as an IEEE Micro Top Pick in 2021.
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