We're pleased to welcome Qijing Jenny Huang, a research scientist from NVIDIA, as the next speaker of our computer architecture seminar series. She will be presenting "A Systematic and Rapid Approach to Design Space Exploration for Tensor Accelerators."
ABSTRACT: Architectural design space exploration (DSE) is a critical yet challenging aspect of chip design. The process involves searching through a vast space of hardware design options and mapping configurations, along with performance evaluations to guide optimization. Although AI/ML is at an inflection point for wide application in data-rich problems, its direct adoption in DSE remains inefficient due to several challenges: the high-dimensional and discrete nature of the search space, lengthy mapping search and evaluation cycles, and a lack of design data for generalization.
In this talk, Qijing Jenny Huang will discuss the tools and techniques her team applied in DSE to address these challenges. Specifically, she will cover an optimization-based mapper and an analytical performance model for rapid tensor accelerator evaluation; a variational autoencoder approach to transform the design space into a continuous low-dimensional space; and a novel design tool to compute data movement limits for tensor algorithms, providing critical insights into optimizing accelerator performance and energy by visualizing both the limits and optimal mapping choices through “ski-slope” diagrams.
QIJING JENNY HUANG is a research scientist at NVIDIA. Her research focuses on emerging
GPU architecture and the co-optimization of algorithms, mappings and hardware to enhance
the system performance. Before NVIDIA, she earned her doctorate in computer science from
the University of California, Berkeley. During her doctorate, she worked on algorithm-hardware
codesign, HLS-based design methodology. and ML/ILP-assisted compiler optimization and
hardware DSE techniques